pfw:clavis
Unterschiede
Hier werden die Unterschiede zwischen zwei Versionen angezeigt.
Beide Seiten der vorigen RevisionVorhergehende ÜberarbeitungNächste Überarbeitung | Vorhergehende Überarbeitung | ||
pfw:clavis [2025-06-14 23:49] – [Forth implementation (noForth)] mka | pfw:clavis [2025-06-15 08:43] (aktuell) – [Background information] topic of bouncing added mka | ||
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Zeile 5: | Zeile 5: | ||
Forth has '' | Forth has '' | ||
- | {{: | + | {{: |
Zeile 34: | Zeile 34: | ||
In the direction register, P1.7 is set to digital IN. | In the direction register, P1.7 is set to digital IN. | ||
The integrated pull-up resistor is activated to support the high level. | The integrated pull-up resistor is activated to support the high level. | ||
- | The integrated | + | The integrated |
However, no interrupt should occur, so it is disabled. | However, no interrupt should occur, so it is disabled. | ||
The pin is used in the I/O function. | The pin is used in the I/O function. | ||
Zeile 118: | Zeile 118: | ||
=== What is a Port? === | === What is a Port? === | ||
- | |||
- | See: Texas Instruments MSP430F2xx, MSP430G2xx Family User’s Guide - 8 Digital I/O, p.339ff | ||
In short: The " | In short: The " | ||
- | + | See: Texas Instruments MSP430F2xx, MSP430G2xx Family User’s Guide - 8 Digital I/O, p.339ff | |
=== How long is a key press? === | === How long is a key press? === | ||
A manual short key press took around 120ms if I tapped the key only once. | A manual short key press took around 120ms if I tapped the key only once. | ||
- | As you can see in the image, the key //bounces// briefly at the beginning until a stable LOW state is reached. | ||
- | In the second image, the bounce phase has been enlarged. After about 1ms, the bouncing was over. | ||
{{: | {{: | ||
+ | |||
+ | As you can see in the image, the key //bounces// briefly at the beginning until a stable LOW state is reached. | ||
{{: | {{: | ||
- | The port pin reacts to the first falling edge. Subsequent edges, caused by bouncing, do not trigger anything. The next falling edge would only be registered once the interrupt flag has been reset by the program. | + | In the second image, the bounce phase has been enlarged. After about 1ms, the bouncing was over. |
+ | The port pin reacts to the first falling edge. Subsequent edges, caused by bouncing, do not trigger anything. The next falling edge would only be registered once the interrupt flag has been reset by the program. | ||
+ | More on the [[pfw: | ||
pfw/clavis.1749937759.txt.gz · Zuletzt geändert: 2025-06-14 23:49 von mka