Dr Chen-Hanson Ting
A couple of years ago, I closed my website www.offete.com and stopped distributing my publications on-line. Nevertheless, these publications still exist on my electronic bookshelf. If you need any of them, please send me an email-request, I will send it in a return email, and also bill you by a PayPal invoice. I know, we are in the 21st century now. You cannot do anything without a website. But, at least I got rid of lots of paper, and the snail mail. Juergen Pintaske twisted my arm to get Footsteps in an Empty Valley updated from a printed copy, which was edited on an old word processor TMaker on a CP/M machine and printed with a Diablo daisy wheel printer. Files got lost with the CP/M machine. I had to scan all the pages and used OCR to recover the text. The hardest part was Chuck Moore’s source code of cmForth, which he printed on an Epson dot matrix printer with a worn ribbon. Lots of the dots disappeared through the copying processes. I tried my best to bring back the code, but couldn’t be entirely sure. I hope nobody will use the code for any purpose other than reading. Well. Let me know if you have any question.
San Mateo, California
The Laws of Computing, Dr. C.H. Ting, a look from the Forth side.
See as well the eBook Irreducible Complexity.
After I learnt a Forth system, I always tried to document it so I could teach other people how to use it. So I wrote about polyForth, figForth, F83, F-PC, and cmForth. When Win32Forth came along, I gave up, because it was too large and too complicated. I then focused on developing eForth for microcontrollers. After retirement, I cleaned out the books off my shelves. People still asked for them, so I converted some to pdf files. Here is the list of available titles:
Description of the first Forth chip NC4000 from Novix, and Chuck Moore’s cmForth for it. cmForth was the simplest and most compact specification of a real Forth system for a real Forth computer. It contains a complete Forth system with a target compiler, an optimizing assembler, and a serial disk driver. Required reading for all Forth programmers.
The most authoritative treatise on how's and why's of the figForth Model developed by Bill Ragsdale. Internal structure of the figForth system. Very detailed discussions on the inner interpreters and the outer (text) interpreter of Forth.
Everything you want to know about the Perry-Laxen F83 system but are afraid to ask. 288 packed pages divided into 4 parts: Tutorial on F83 system, Kernel, Utility, and Tools. It is based on 8086 vi F83 Version 2.1 for the IBM-PC, but useful as a reference manual for all other (8080 and 68000) F83 systems.
Narration on all words in the kernel and tools of F-PC, a practically useful Forth system for applications on PC. Functional description of the utilities and applications. Valuable guide to F-PC internals and assembly coding on segmented 80386 architecture.
Complete description and exposition of the eForth Model: kernel, high level words, interpreters, compiler and utilities. Comparison of Forth and Zen, their similarities in simplicity and understanding. It is updated, based on 32-Bit 586 eForth v5.2 for Visual Studio Community 2015. It is in an assembly file as a C++ console project. It uses the indirect thread model so that new colon words can be added to the .data segment. It is optimized with 71 code words and 110 colon words.
A tutorial in 4 parts for building firmware for embedded systems, based on enhanced eForth. Hands-on experiments using CT100 Lab Board with 8051. 8086 eForth 2.02 and 8051 eForth 2.03 are included with the original eForth 1.01 Models for 8086 and 8051.
I had always looked for low-cost microcontroller kits to teach people Forth. Over the years, these kits were getting cheaper and more powerful, and I ported eForth to a lot of them. I had lots of fun with them, and I enjoyed seeing others having fun (and making useful products) as well. eForth captures the essence of Forth, as an universal programming language for small, embedded systems. These eForth implementations are distributed with source code and substantial documentation.
eForth for ADuC7020 MicroConverters from Analog Devices. It is written in ARM7 assembler on a Keil IDE. It uses the ARM7 link register for threading, and is fully optimized to make the best use of ARM7 core and analog peripherals integrated in this true microcontroller.
eForth for the AT91SAM7X256 microcontroller from Atmel. It is in ARM7 assembler on Keil uVision3 RealView IDE. It uses the DBGU serial port to interact with user. Olimex's SAM7-EX256 Board has a very interesting color LCD module. This eForth has graphic primitives to drive the LCD display.
cEF is a Forth implementation based on the eForth Model, and compiled by the gcc compiler in Cygwin on a PC. The underlying Virtual Forth Machine has the standard 33 machine instructions defined in the original eForth Model. It is targeted to microprocessors without floating point coprocessor, and uses only integer arithmetic operations.
cEF is a Forth implementation based on eForth Model, and compiled by gcc compiler in Cygwin. The Virtual Forth Machine has 64 machine instructions. Multiplication and division are implemented using double arithmetic floating operations. It is highly optimized to take advantage of recent microprocessors with floating point coprocessors.
STM8S is an 8 bit microcontroller from STMicroelectronics. ST is distributing a STM8S-Discovery Board for less than 2 ==== 5 This is a very efficient implementation of eForth for ATmega328P microcontroller used on the Arduino Uno Kit. It is using the Subroutine Thread Model. It uses tools in NRWW memory to compile new words in main RWW flash memory. It allows you to build turnkey systems for commercial applications. It requires a flash programming tool.
This is an Arduino sketch which can be compiled and uploaded via the Arduino IDE. The Forth Virtual Machine is coded in C, and the Forth dictionary is imported as a data array. The Forth dictionary can be extended into the RAM memory, so you can add new commands to this system. The dictionary is produced by a metacompiler running under F#. The source code of the metacompiler is included for you to enhance this system.
This is a Forth system for the MSP430G2553 microcontroller used on the LaunchPad from TI. It is a 16-bit Forth implementation to be assembled by the Code Composer Studio 5.2. It makes the best use of the 16 KB of flash memory, leaving about 10 KB for your applications.
This eForth is for STM32F407 chip on STM32 F4 Discovery Kit from STMicroelectronics. This chip has 1 MB flash memory, 192 KB of RAM, and a ton of interesting IO devices. STM32 is no longer an ARM7 chip, but a THUMB2 chip. STMeForth720 is optimized for the new environment.
This is a Forth system optimized for the MSP430G2553 microcontroller used on the LaunchPad from TI. It is changed from the subroutine threaded model to a direct threaded model, faster and more compact.
Enhanced 32-bit eForth for 80586 running under Visual Studio Community 2015. It is assembled by MASM buried under C++ as a console project. Now you can evaluate the eForth model conveniently in latest Windows environment.
It is an assembly file in a C++ console project on Visual Studio Community 2015. It requires library files supplied by Kip Irvine for Windows services. It uses the indirect threaded model so that new colon words can be added to the data segment. It is optimized with 71 code words and 110 colon words. Now you can test drive eForth on newer Windows PC.
ESP8266 is a 32-bit microcontroller with integrated WiFi antenna and software drivers. The Arduino IDE can compile and upload applications to it. espForth is an Arduino sketch which allows Forth commands to be sent to the ESP8266 remotely as UDP packets. IoT for fun!
I had used VHDL to design Forth processors and tested them on FPGA’s. They included a 16-bit processor eP16 and a 32-bit processor eP32. I ported eForth to these chips for design verification. In 2016, we ran a CPU Design Workshop in Silicon Valley Forth Interest Group, and I used designs of the Intel 8080 and DEC PDP1 as exercises. It was interesting that eForth was used here as test bench, which was much more difficult to design than the CPUs themselves.
eP16 is a 16 bit microcontroller. It was implemented on aLatticeXP2 Brevia Development Kit with LatticeXP2-5E FPGA. It includes a CPU module, a UART module and a GPIO module. An eForth metacompiler producing eForth RAM image is included with all source code.
eP32 is a 32 bit microcontroller. It was implemented on aLatticeXP2 Brevia Development Kit with LatticeXP2-5E FPGA. It includes a CPU module, a UART module and a GPIO module. An eForth metacompiler produces the eForth RAM image. It is the best Forth engine design on the cheapest FPGA kit. All VHDL files and eForth files are included.
eP8080 was a CPU model used in the SVFIG FPGA Design Workshop. It recreated an i8080 chip in FPGA. 80eForth202 was the Forth system embedded in VHDL for design verification and to help debugging the chip. The eForth RAM image was derived from 86eForth v2.2 and Z80eForth by Ken Chen, assembled with MASM.
ePDP1 was another CPU model used in SVFIG FPGA Design Workshop. It recreated a PDP1 chip in FPGA. PDP1eForth was the Forth system embedded in VHDL for design verification and to help debugging the chip. It was derived from eP16, and used a metacompiler in F# to create the eForth dictionary to initialize RAM memory
Some documentations are available as eBooks, part of Juergen’ s Forth Bookshelf
FIG-Forth Manual – including the 1802 IP running on Lattice ICE40 8k FPGA Development Board
eP32 in VHDL for Lattice XP2 Brevia - Kit: see 2158 above.